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 MC74AC00, MC74ACT00 Quad 2-Input NAND Gate
High-Performance Silicon-Gate CMOS
Features
* * * * * * *
Output Drive Capability: $24 mA Operating Voltage Range: 2 to 6 V AC00; 4.5 to 5.5 ACT00 Low Input Current: 1.0 mA High Noise Immunity Characteristic of CMOS Devices In Compliance With the JEDEC Standard No. 7A Requirements Chip Complexity: 32 FETs Pb-Free Packages are Available
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14 PDIP-14 N SUFFIX CASE 646 14 1 1 14 SOIC-14 D SUFFIX CASE 751A 1 xxx00 AWLYWWG MC74xxx00N AWLYYWWG
A1 B1 A2 B2 A3 B3 A4 B4
1 2 4 5 9 10 12 13 PIN 14 = VCC PIN 7 = GND
3
Y1 14 1
6
Y2 Y = AB
14 xxx 00 ALYWG G 1
8
Y3
1 14
TSSOP-14 DT SUFFIX CASE 948G
11
Y4 SOEIAJ-14 M SUFFIX CASE 965
14 74xxx00 ALYWG 1 xxx = AC or ACT A = Assembly Location WL or L = Wafer Lot YY or Y = Year WW or W = Work Week G = Pb-Free Package
Figure 1. Logic Diagram
VCC 14 B4 13 A4 12 Y4 11 B3 10 A3 9 Y3 8
14 1
1 A1
2 B1
3 Y1
4 A2
5 B2
6 Y2
7 GND A L L H H
FUNCTION TABLE
Inputs B L H L H Output Y H H H L
Figure 2. Pinout: 14-Lead Packages (Top View)
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet.
(c) Semiconductor Components Industries, LLC, 2006
October, 2006 - Rev. 9
1
Publication Order Number: MC74AC00/D
MC74AC00, MC74ACT00
MAXIMUM RATINGS
Symbol VCC VI VO IIK IOK IO ICC IGND TSTG TL TJ qJA DC Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Sink/Source Current DC Supply Current per Output Pin DC Ground Current per Output Pin Storage Temperature Range Lead temperature, 1 mm from Case for 10 Seconds Junction temperature under Bias Thermal resistance PDIP SOIC TSSOP PDIP SOIC TSSOP (Note 1) Parameter Value *0.5 to )7.0 *0.5 v VI v VCC )0.5 *0.5 v VO v VCC )0.5 $20 $50 $50 $50 $50 *65 to )150 260 )150 78 125 170 78 125 170 Level 1 Oxygen Index: 30% - 35% Human Body Model (Note 2) Machine Model (Note 3) Charged Device Model (Note 4) UL 94 V-0 @ 0.125 in > 2000 > 200 > 1000 V Unit V V V mA mA mA mA mA C C C C/W
PD
Power Dissipation in Still Air at 85C
mW
MSL FR VESD
Moisture Sensitivity Flammability Rating ESD Withstand Voltage
Above VCC and Below GND at 85C (Note 5) $100 mA Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. IO absolute maximum rating must be observed. 2. Tested to EIA/JESD22-A114-A. 3. Tested to EIA/JESD22-A115-A. 4. Tested to JESD22-C101-A. 5. Tested to EIA/JESD78.
ILatch-Up
Latch-Up Performance
RECOMMENDED OPERATING CONDITIONS
Symbol VCC Vin, Vout tr, tf Supply Voltage DC Input Voltage, Output Voltage (Ref. to GND) Input Rise and Fall Time (Note 6) MC74AC00 Input Rise and Fall Time (Note 7) MC74ACT00 Junction Temperature Operating Ambient Temperature Range Output Current - High Output Current - Low VCC @ 3.0 V VCC @ 4.5 V VCC @ 5.5 V VCC @ 4.5 V VCC @ 5.5 V Parameter MC74AC00 MC74ACT00 Min 2.0 4.5 0 - - - - - - -55 - - Typ 5.0 5.0 - 150 40 25 10 8.0 - 25 - - Max 6.0 5.5 VCC - - - - - 150 125 -24 24 Unit V V ns/V
tr, tf TJ TA IOH IOL
ns/V C C mA mA
6. Vin from 30% to 70% VCC. 7. Vin from 0.8 V to 2.0 V.
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2
MC74AC00, MC74ACT00
DC CHARACTERISTICS
MC74AC00 VCC (V) 3.0 4.5 5.5 3.0 4.5 5.5 3.0 4.5 5.5 3.0 4.5 5.5 VOL Maximum Low Level Output Voltage 3.0 4.5 5.5 3.0 4.5 5.5 IIN IOLD IOHD ICC Maximum Input Leakage Current Minimum Dynamic Output Current Maximum Quiescent Supply Current 5.5 5.5 5.5 5.5 TA = +255C Typ 1.5 2.25 2.75 1.5 2.25 2.75 2.99 4.49 5.49 - - - 0.002 0.001 0.001 - - - - - - - 2.1 3.15 3.85 0.9 1.35 1.65 2.9 4.4 5.4 2.56 3.86 4.86 0.1 0.1 0.1 0.36 0.36 0.36 $0. 1 - - 4.0 TA = -405C to +855C 2.1 3.15 3.85 0.9 1.35 1.65 2.9 4.4 5.4 2.46 3.76 4.76 0.1 0.1 0.1 0.44 0.44 0.44 $1.0 75 -75 40 TA = -555C + 1255C Unit 2.1 3.15 3.85 0.9 1.35 1.65 2.9 4.4 5.4 2.4 3.7 4.7 0.1 0.1 0.1 0.5 0.5 0.5 $1.0 50 -50 40 V Conditions VOUT = 0.1 V or VCC - 0.1 V VOUT = 0.1 V or VCC - 0.1 V IOUT = -50 mA
Symbol VIH
Parameter Minimum High Level Input Voltage Maximum Low Level Input Voltage Minimum High Level Output Voltage
Guaranteed Limits
VIL
V
VOH
V
V
*VIN = VIL or VIH -12 mA IOH -24 mA -24 mA IOUT = 50 mA
V
V
*VIN = VIL or VIH 12 mA IOL 24 mA 24 mA VI = VCC, GND VOLD = 1.65 V Max VOHD = 3.85 V Min VIN = VCC or GND
mA mA mA mA
*All outputs loaded; thresholds on input associated with output under test. Maximum test duration 2.0 ms, one output loaded at a time. NOTE: IIN and ICC @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V VCC.
AC CHARACTERISTICS (tr = tf = 3.0 nS; CL = 50 pF; see Figures 3 and 4 for Waveforms)
MC74AC00 VCC* (V) 3.3 5.0 3.3 5.0 TA = +255C Min 2.0 1.5 1.5 1.5 Typ 7.0 6.0 5.5 4.5 Max 9.5 8.0 8.0 6.5 TA = -405C to +855C Min 2.0 1.5 1.0 1.0 Max 10.0 8.5 8.5 7.0 TA = -555C to + 1255C Min 1.0 1.0 1.0 1.0 Max 11.0 8.5 9.0 7.0 Unit ns ns
Symbol tPLH tPHL
Parameter Propagation Delay Propagation Delay
*Voltage Range 3.3 V is 3.3 V $0.3 V. Voltage Range 5.0 V is 5.0 V $0.5 V.
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3
MC74AC00, MC74ACT00
DC CHARACTERISTICS
MC74ACT00 VCC (V) 4.5 5.5 4.5 5.5 4.5 5.5 4.5 5.5 VOL Maximum Low Level Output Voltage 4.5 5.5 4.5 5.5 IIN DICCT IOLD IOHD ICC Maximum Input Leakage Current Additional Max. ICC/Input Minimum Dynamic Output Current Maximum Quiescent Supply Current 5.5 5.5 5.5 5.5 5.5 TA = +255C Typ 1.5 1.5 1.5 1.5 4.49 5.49 - - 0.001 0.001 - - - 0.6 - - - 2.0 2.0 0.8 0.8 4.4 5.4 3.86 4.86 0.1 0.1 0.36 0.36 $0.1 - - - 4.0 TA = -405C to +855C 2.0 2.0 0.8 0.8 4.4 5.4 3.76 4.76 0.1 0.1 0.44 0.44 $1.0 1.5 75 -75 40 TA = -555C to + 1255C Unit 2.0 2.0 0.8 0.8 4.4 5.4 3.7 4.7 0.1 0.1 0.5 0.5 $1.0 1.6 50 -50 40 V V V V Conditions VOUT = 0.1 V or VCC - 0.1 V VOUT = 0.1 V or VCC - 0.1 V IOUT = -50 mA *VIN = VIL or VIH IOH -24 mA -24 mA IOUT = 50 mA *VIN = VIL or VIH IOL 24 mA 24 mA VI = VCC, GND VI = VCC - 2.1 V VOLD = 1.65 V Max VOHD = 3.85 V Min VIN = VCC or GND
Symbol VIH VIL VOH
Parameter Minimum High Level Input Voltage Maximum Low Level Input Voltage Minimum High Level Output Voltage
Guaranteed Limits
V V
mA mA mA mA mA
*All outputs loaded; thresholds on input associated with output under test. Maximum test duration 2.0 ms, one output loaded at a time.
AC CHARACTERISTICS (tr = tf = 3.0 nS; CL = 50 pF; see Figures 3 and 4 for Waveforms)
MC74ACT00 VCC* (V) 5.0 5.0 TA = +255C Min 1.5 1.5 Typ 5.5 4.0 Max 9.0 7.0 TA = -405C to +855C Min 1.0 1.0 Max 9.5 8.0 TA = -555C to +1255C Min 1.0 1.0 Max 9.5 8.0 Unit ns ns
Symbol tPLH tPHL
Parameter Propagation Delay Propagation Delay
*Voltage Range 5.0 V is 5.0 V $0.5 V.
CAPACITANCE
Symbol CIN CPD Input Capacitance Power Dissipation Capacitance Parameter Value Typ 4.5 30 Test Conditions VCC = 5.0 V VCC = 5.0 V Unit pF pF
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4
MC74AC00, MC74ACT00
tf 90% INPUT Vmi A OR B 10% tPLH tPHL tr VCC
GND
OUTPUT Y
50%
Vmi
= 50% for MC74AC00 = 1.5 V for MC74ACT00
Figure 3. Switching Waveforms
INPUT
OUTPUT DEVICE UNDER TEST CL*
450 W
50 W Scope Test Point
*Includes all probe and jig capacitance
Figure 4. Test Circuit
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5
MC74AC00, MC74ACT00
ORDER INFORMATION
Device MC74AC00D MC74AC00DG MC74AC00N MC74AC00NG MC74AC00DR2 MC74AC00DR2G MC74AC00DTR2 MC74AC00DTR2G MC74AC00MEL MC74AC00MELG MC74ACT00N MC74ACT00NG MC74ACT00D MC74ACT00DG MC74ACT00DR2 MC74ACT00DR2G MC74ACT00DTR2 MC74ACT00DTR2G MC74ACT00MEL MC74ACT00MELG Package SOIC-14 SOIC-14 (Pb-Free) PDIP-14 PDIP-14 (Pb-Free) SOIC-14 SOIC-14 (Pb-Free) TSSOP-14* TSSOP-14* SOEIAJ-14 SOEIAJ-14 (Pb-Free) PDIP-14 PDIP-14 (Pb-Free) SOIC-14 SOIC-14 (Pb-Free) SOIC-14 SOIC-14 (Pb-Free) TSSOP-14* TSSOP-14* SOEIAJ-14 SOEIAJ-14 (Pb-Free) 2000 / Tape and Reel 2500 / Tape and Reel 55 Units / Rail 25 Units / Rail 2000 / Tape and Reel 2500 / Tape and Reel 25 Units / Rail 55 Units / Rail Shipping
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb-Free.
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6
MC74AC00, MC74ACT00
PACKAGE DIMENSIONS
SOIC-14 CASE 751A-03 ISSUE H
-A-
14 8
-B-
P 7 PL 0.25 (0.010)
M
B
M
1
7
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION.
G C -T-
SEATING PLANE
R X 45 _
F
D 14 PL 0.25 (0.010)
K
M
M
S
J
TB
A
S
DIM A B C D F G J K M P R
MILLIMETERS MIN MAX 8.55 8.75 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50
INCHES MIN MAX 0.337 0.344 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.228 0.244 0.010 0.019
SOLDERING FOOTPRINT*
7X
7.04 1 0.58
14X
14X
1.52
1.27 PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
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7
MC74AC00, MC74ACT00
PDIP-14 CASE 646-06 ISSUE P
14
8
B
1 7
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. INCHES MIN MAX 0.715 0.770 0.240 0.260 0.145 0.185 0.015 0.021 0.040 0.070 0.100 BSC 0.052 0.095 0.008 0.015 0.115 0.135 0.290 0.310 --- 10 _ 0.015 0.039 MILLIMETERS MIN MAX 18.16 19.56 6.10 6.60 3.69 4.69 0.38 0.53 1.02 1.78 2.54 BSC 1.32 2.41 0.20 0.38 2.92 3.43 7.37 7.87 --- 10 _ 0.38 1.01
A F N -T-
SEATING PLANE
L C
H
G
D 14 PL
K
M
J M
DIM A B C D F G H J K L M N
0.13 (0.005)
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8
MC74AC00, MC74ACT00
PACKAGE DIMENSIONS
TSSOP-14 CASE 948G-01 ISSUE B
14X K REF
0.10 (0.004) 0.15 (0.006) T U
S
M
TU
S
V N
S
2X
L/2
14
8
0.25 (0.010) M
L
PIN 1 IDENT. 1 7
B -U-
N F DETAIL E K
0.15 (0.006) T U
S
J J1
SECTION N-N -W-
C 0.10 (0.004) -T- SEATING
PLANE
D
G
H
DETAIL E
SOLDERING FOOTPRINT*
7.06 1
0.36
14X
14X
1.26
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
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9
CCC EEE CCC EEE CCC
A -V-
K1
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. MILLIMETERS INCHES DIM MIN MAX MIN MAX A 4.90 5.10 0.193 0.200 B 4.30 4.50 0.169 0.177 C --- 1.20 --- 0.047 D 0.05 0.15 0.002 0.006 F 0.50 0.75 0.020 0.030 G 0.65 BSC 0.026 BSC H 0.50 0.60 0.020 0.024 J 0.09 0.20 0.004 0.008 J1 0.09 0.16 0.004 0.006 K 0.19 0.30 0.007 0.012 K1 0.19 0.25 0.007 0.010 L 6.40 BSC 0.252 BSC M 0_ 8_ 0_ 8_
0.65 PITCH
DIMENSIONS: MILLIMETERS
MC74AC00, MC74ACT00
PACKAGE DIMENSIONS
SOEIAJ-14 CASE 965-01 ISSUE A
14
8
LE Q1 E HE M_ L DETAIL P
1
7
Z D e A VIEW P
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 5. THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.018). DIM A A1 b c D E e HE 0.50 LE M Q1 Z MILLIMETERS MIN MAX --- 2.05 0.05 0.20 0.35 0.50 0.10 0.20 9.90 10.50 5.10 5.45 1.27 BSC 7.40 8.20 0.50 0.85 1.10 1.50 10 _ 0_ 0.70 0.90 --- 1.42 INCHES MIN MAX --- 0.081 0.002 0.008 0.014 0.020 0.004 0.008 0.390 0.413 0.201 0.215 0.050 BSC 0.291 0.323 0.020 0.033 0.043 0.059 10 _ 0_ 0.028 0.035 --- 0.056
c
b 0.13 (0.005)
M
A1 0.10 (0.004)
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative
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10
MC74AC00/D


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